2 research outputs found

    Low-power CMOS front-ends for wireless personal area networks

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    The potential of implementing subthreshold radio frequency circuits in deep sub-micron CMOS technology was investigated for developing low-power front-ends for wireless personal area network (WPAN) applications. It was found that the higher transconductance to bias current ratio in weak inversion could be exploited in developing low-power wireless front-ends, if circuit techniques are employed to mitigate the higher device noise in subthreshold region. The first fully integrated subthreshold low noise amplifier was demonstrated in the GHz frequency range requiring only 260 μW of power consumption. Novel subthreshold variable gain stages and down-conversion mixers were developed. A 2.4 GHz receiver, consuming 540 μW of power, was implemented using a new subthreshold mixer by replacing the conventional active low noise amplifier by a series-resonant passive network that provides both input matching and voltage amplification. The first fully monolithic subthreshold CMOS receiver was also implemented with integrated subthreshold quadrature LO (Local Oscillator) chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage amplification, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling were combined to lower the total power consumption to 2.6 mW. Extremely compact resistive feedback CMOS low noise amplifiers were presented as a cost-effective alternative to narrow band LNAs using high-Q inductors. Techniques to improve linearity and reduce power consumption were presented. The combination of high linearity, low noise figure, high broadband gain, extremely small die area and low power consumption made the proposed LNA architecture a compelling choice for many wireless applications.Ph.D.Committee Chair: Laskar, Joy; Committee Member: Chakraborty, Sudipto; Committee Member: Chang, Jae Joon; Committee Member: Divan, Deepakraj; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanoui

    A SiGe Sub-Harmonic Mixer for Millimeter-Wave Applications

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    A SiGe sub-harmonic down-conversion mixer using a novel active anti-parallel diode pair is presented for millimeter-wave applications. The proposed architecture can help reduce conversion loss and also lower the required local oscillator power. With an LO power of 0 dBm, the measured 2times conversion gain varies from -5 to -7.8 dB in the 50 to 65 GHz range. Compared to earlier reports of millimeter-wave SiGe and GaAs sub-harmonic mixers requiring 5 to 10 dBm of LO power, this circuit achieves similar conversion loss with an LO power as low as -7.5 dBm, while consuming only 0.5 mW of DC power
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